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? 2005-2013 microchip technology inc. ds21813f-page 1 tc1017 features: space-saving 5-pin sc-70 and sot-23 packages extremely low operating current for longer battery life: 53 a (typ.) very low dropout voltage rated 150 ma output current requires only 1 f ceramic output capacitance high output voltage accuracy: ? 0.5% (typical) 10 s (typ.) wake-up time from shdn power-saving shutdown mode: 0.05 a (typ.) overcurrent and overtemperature protection pin-compatible upgrade for bipolar regulators applications: cellular/gsm/phs phones battery-operated systems portable computers medical instruments electronic games pagers general description: the tc1017 is a high-accuracy (typically 0.5%) cmos upgrade for bipolar low dropout regulators (ldos). it is offered in a sc-70 or sot-23 package. the sc-70 package represents a 50% footprint reduc- tion versus the popular sot-23 package and is offered in two pinouts to make board layout easier. developed specifically for battery-powered systems, the tc1017s cmos construction consumes only 53 a typical supply current over the entire 150 ma operating load range. this can be as much as 60 times less than the quiescent operating current consumed by bipolar ldos. the tc1017 is designed to be stable, over the entire input voltage and output current range, with low-value (1 f) ceramic or tantalum capacitors. this helps to reduce board space and save cost. additional inte- grated features, such as shutdown, overcurrent and overtemperature protection, further reduce the board space and cost of the entire voltage-regulating application. key performance parameters for the tc1017 include low dropout voltage (285 mv typical at 150 ma output current), low supply current while shutdown (0.05 a typical) and fast stable response to sudden input voltage and load changes. package types sc-70 13 4 5 2 shdn nc v out v in gnd tc1017 sot-23 1 23 54 nc v out shdn gnd v in tc1017 13 4 5 2 v in gnd nc v out shdn tc1017r 150 ma, tiny cmos ldo with shutdown downloaded from: http:///
tc1017 ds21813f-page 2 ? 2005-2013 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings ? input voltage ............................................. .......................6.5v power dissipation ......................... internally limited ( note 7 ) maximum voltage on any pin ..................v in + 0.3v to -0.3v ? notice: stresses above those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specific ation is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. pin function table name function shdn shutdown control input. nc no connect gnd ground terminal v out regulated voltage output v in unregulated supply input electrical characteristics electrical specifications: unless otherwise noted, v in = v r + 1v, i l = 100 a, c l = 1.0 f, shdn > v ih , t a = +25c boldface type specifications apply for junction temperatures of C40c to +125c. parameter sym. min. typ. max. units test conditions input operating voltage v in 2.7 6.0 v note 1 maximum output current i outmax 100 m a note 1 150 v in >= 3v and v in >= (v r + 2.5%) + v dropoutmax output voltage v out v r C 2.5% v r 0.5% v r + 2.5% v note 2 v out temperature coefficient tcv out 40 ppm/c note 3 line regulation ??? v out / ? v in )| / v r 0 . 0 4 0.2 %/v (v r + 1v) < v in < 6v load regulation ( note 4 ) ?? v out | / v r 0 . 3 8 1.5 %i l = 0.1 ma to i outmax dropout voltage ( note 5 ) v in C v out 2 90 180285 200350 500 mv i l = 100 a i l = 50 ma i l = 100 ma i l = 150 ma supply current i in 5 3 90 a shdn = v ih , i l = 0 shutdown supply current i insd 0.05 2 a shdn = 0v power supply rejection ratio psrr 58 db f =1 khz, i l = 50 ma note 1: the minimum v in has to meet two conditions: v in ? 2.7v and v in ? (v r + 2.5%) + v dropout . 2: v r is the regulator voltage setting. for example: v r = 1.8v, 2.7v, 2.8v, 3.0v. 3:4: regulation is measured at a constant junction temperature us ing low duty-cycle pulse testing. load regulation is tested over a load range from 0.1 ma to the maximum specified output current. changes in output voltage due to heating effects are covered by the thermal regulation specification. 5: dropout voltage is defined as the input-to-output differential at which the output voltage drops 2% below its nominal value at a 1v differential. 6: thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied, excluding load or line regulation effects. specifications are for a current pulse equal to i lmax at v in = 6v for t = 10 msec. 7: the maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistanc e from junction-to-air (i.e., t a , t j , ? ja ). exceeding the maximum allowable power dissipation causes the device to init iate thermal shutdown. please see section 5.1 thermal shutdown , for more details . 8: output current is limited to 120 ma (typ) when v out is less than 0.5v due to a load fault or short-circuit condition. tcv out v outmax v outmin ? ?? 10 6 ? v out t ?? ------------------------------------------------------------------------------------- - = downloaded from: http:///
? 2005-2013 microchip technology inc. ds21813f-page 3 tc1017 wake-up time (from shutdown mode) t wk 1 0 s v in = 5v, i l = 60 ma, c in = c out =1 f, f = 100 hz settling time (from shutdown mode) t s 3 2 s v in = 5v, i l = 60 ma, c in = 1 f, c out = 1 f, f = 100 hz output short-circuit current i outsc 120 ma v out = 0v, average current ( note 8 ) thermal regulation v out /p d 0 . 0 4v / w notes 6 , 7 thermal shutdown die temperature t sd 160 c thermal shutdown hysteresis ? t sd 1 0 c output noise en 800 nv/ ? hz f = 10 khz shdn input high threshold v ih 45 % v in v in = 2.7v to 6.0v shdn input low threshold v il 15 %v in v in = 2.7v to 6.0v electrical characteristics (continued) electrical specifications: unless otherwise noted, v in = v r + 1v, i l = 100 a, c l = 1.0 f, shdn > v ih , t a = +25c boldface type specifications apply for junction temperatures of C40c to +125c. parameter sym. min. typ. max. units test conditions note 1: the minimum v in has to meet two conditions: v in ? 2.7v and v in ? (v r + 2.5%) + v dropout . 2: v r is the regulator voltage setting. for example: v r = 1.8v, 2.7v, 2.8v, 3.0v. 3:4: regulation is measured at a constant junction temperature us ing low duty-cycle pulse testing. load regulation is tested over a load range from 0.1 ma to the maximum specified output current. changes in output voltage due to heating effects are covered by the thermal regulation specification. 5: dropout voltage is defined as the input-to-output differential at which the output voltage drops 2% below its nominal value at a 1v differential. 6: thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied, excluding load or line regulation effects. specifications are for a current pulse equal to i lmax at v in = 6v for t = 10 msec. 7: the maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistanc e from junction-to-air (i.e., t a , t j , ? ja ). exceeding the maximum allowable power dissipation causes the device to init iate thermal shutdown. please see section 5.1 thermal shutdown , for more details . 8: output current is limited to 120 ma (typ) when v out is less than 0.5v due to a load fault or short-circuit condition. tcv out v outmax v outmin ? ?? 10 6 ? v out t ?? ------------------------------------------------------------------------------------- - = temperature characteristics electrical specifications: unless otherwise indicated, v dd = +2.7v to +6.0v and v ss = gnd. parameters sym. min. typ. max. units conditions temperature ranges specified temperature range t a -40 +125 c extended temperature parts operating temperature range t a -40 +125 c storage temperature range t a -65 +150 c thermal package resistances3 thermal resistance, 5l-sot23 ? ja 255 c/w thermal resistance, 5l-sc-70 ? ja 450 c/w downloaded from: http:///
tc1017 ds21813f-page 4 ? 2005-2013 microchip technology inc. 2.0 typical performance characteristics note: unless otherwise noted, v in = v r + 1v, i l = 100 a, c l = 1.0 f, shdn > v ih , t a = +25c. figure 2-1: dropout voltage vs. output current. figure 2-2: load regulation vs. temperature. figure 2-3: supply current vs. input voltage. figure 2-4: dropout voltage vs. temperature. figure 2-5: short-circuit current vs. input voltage. figure 2-6: supply current vs. temperature. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0 25 50 75 100 125 150 load current (ma) dropout voltage (v) t a = +125c t a = +25c t a = -40c v out = 2.85v -0.70 -0.65 -0.60 -0.55 -0.50 -0.45 -0.40 -0.35 -0.30 -40 -15 10 35 60 85 110 temperature (c) load regulation (%) v out = 2.85 v i out = 0-150 ma v in = 6.0 v v in = 3.85v v in = 3.3 v 50 51 52 53 54 55 56 57 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0 input voltage (v) supply current (a) t a = -40c t a = +25c t a = +125c v out = 2.85v 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 -40 -15 10 35 60 85 110 temperature (c) dropout voltage (v) i out = 50 ma i out = 100 ma i out = 150 ma v out = 2.85v 0 20 40 60 80 100 120 140 160 123456 input voltage (v) short circuit current (ma) v out = 2.85v 50 51 52 53 54 55 56 57 -40 -15 10 35 60 85 110 temperature (c) supply current (a) v in = 6.0v v in = 3.85v v in = 3.3v v out = 2.85v downloaded from: http:///
? 2005-2013 microchip technology inc. ds21813f-page 5 tc1017 note: unless otherwise noted, v in = v r + 1v, i l = 100 a, c l = 1.0 f, shdn > v ih , t a = +25c. figure 2-7: dropout voltage vs. output current. figure 2-8: load regulation vs. temperature. figure 2-9: supply current vs. temperature. figure 2-10: dropout voltage vs. temperature. figure 2-11: supply current vs. input voltage. figure 2-12: output voltage vs. supply voltage. 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0 25 50 75 100 125 150 load current (ma) dropout voltage (v) v out = 3.30v t a = +125c t a = +25c t a = -40c -0.70 -0.65 -0.60 -0.55 -0.50 -0.45 -0.40 -0.35 -0.30 -40 -15 10 35 60 85 110 temperature (c) load regulation (%) v out = 3.30v i out = 0-150 ma v in = 6.0v v in = 4.0v v in = 4.3v 52 53 54 55 56 57 58 59 60 -40 -15 10 35 60 85 110 temperature (c) supply current (a) v out = 3.30v v in = 4.0v v in = 4.3v v in = 6.0v 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 -40 -15 10 35 60 85 110 temperature (c) dropout voltage (v) v out = 3.30v i out = 150 ma i out = 100 ma i out = 50 ma 52 53 54 55 56 57 58 59 60 4 . 04 . 55 . 05 . 56 . 0 input voltage (v) supply current (a) t a = +125c t a = +25c t a = -40c v out = 3.30v 2.862 2.863 2.864 2.865 2.866 2.867 2.868 2.869 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0 input voltage (v) output voltage (v) v out = 2.85v t a = -40c t a = +25c t a = +125c downloaded from: http:///
tc1017 ds21813f-page 6 ? 2005-2013 microchip technology inc. note: unless otherwise noted, v in = v r + 1v, i l = 100 a, c l = 1.0 f, shdn > v ih , t a = +25c. figure 2-13: output voltage vs. output current. figure 2-14: shutdown current vs. input voltage. figure 2-15: power supply rejection ratio vs. frequency. figure 2-16: output voltage vs. temperature. figure 2-17: output noise vs. frequency. figure 2-18: power supply rejection ratio vs. frequency. 2.854 2.856 2.858 2.860 2.862 2.864 2.866 2.868 2.870 0 25 50 75 100 125 150 load current (ma) output voltage (v) v in = 3.85v v in = 6.0v v out = 2.85v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0 input voltage (v) shutdown current (a) t a = +25c t a = +125c v out = 2.85v -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 1000 frequency (khz) psrr (db) v indc = 3.85v v inac = 100 mvp-p v outdc = 2.85v i out = 100 a c out =1 fx7rceramic 2.862 2.863 2.864 2.865 2.866 2.867 2.868 2.869 -40 -15 10 35 60 85 110 temperature (c) output voltage (v) v in = 3.3v v in = 3.85v v in = 6.0v v out = 2.85v 0.01 0.1 1 10 100 10 100 1000 10000 100000 1000000 frequency (hz) noise (v/ ? hz) v in = 3.85v v out = 2.85v c in = 1 f c out = 1 f i out = 40 ma -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 1000 frequency (khz) psrr (db) v indc = 3.85v v inac = 100 mvp-p v outdc = 2.85v i out =1ma c out =1 fx7rceramic downloaded from: http:///
? 2005-2013 microchip technology inc. ds21813f-page 7 tc1017 note: unless otherwise noted, v in = v r + 1v, i l = 100 a, c l = 1.0 f, shdn > v ih , t a = +25c. figure 2-19: power supply rejection ratio vs. frequency. figure 2-20: wake-up response. figure 2-21: wake-up response. figure 2-22: load transient response. figure 2-23: load transient response. figure 2-24: line transient response. -80 -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 1000 frequency (khz) psrr (db) v indc = 3.85v v inac = 100 mvp-p v outdc = 2.85v i out =50ma c out =1 fx7rceramic v in = 3.85v c in = 10 f c out = 1 f ceramic shutdow n input v out = 2.85v v in = 3.85v c in = 10 f c out = 4.7 f ceramic shutdow n input v out = 2.85v v in = 3.85v c in = 10 f c out = 1 f ceramic v out = 2.85v i out = 0.1 ma to 120 ma v in = 3.85v c in = 10 f c out = 4.7 f ceramic v out = 2.85v i out = 0.1 ma to 120 ma c in = 0 f c out = 1.0 f ceramic i load = 120 ma v out = 2.85v v in = 3.85v to 4.85v downloaded from: http:///
tc1017 ds21813f-page 8 ? 2005-2013 microchip technology inc. note: unless otherwise noted, v in = v r + 1v, i l = 100 a, c l = 1.0 f, shdn > v ih , t a = +25c. figure 2-25: line transient response. figure 2-26: line transient response. figure 2-27: line transient response. c in = 0 f c out = 4.7 f ceramic i load = 120 ma v out = 2.85v v in = 3.85v to 4.85v c in = 0 f c out = 1 f ceramic i load = 100 a v out = 3.33v v in = 4.3v to 5.3v c in = 0 f c out = 10 f ceramic i load = 100 a v out = 3.33v v in = 4.3v to 5.3v downloaded from: http:///
? 2005-2013 microchip technology inc. ds21813f-page 9 tc1017 3.0 pin descriptions the descriptions of the pins are listed in tab l e 3 - 1 . table 3-1: pin function table 3.1 shutdown control input (shdn ) the regulator is fully enabled when a logic-high is applied to shdn . the regulator enters shutdown when a logic-low is applied to this input. during shutdown, the output voltage falls to zero and the supply current is reduced to 0.05 a (typ.) 3.2 ground terminal for best performance, it is recommended that the ground pin be tied to a ground plane. 3.3 regulated voltage output (v out ) bypass the regulated voltage output to gnd with a minimum capacitance of 1 f. a ceramic bypass capacitor is recommended for best performance. 3.4 unregulated supply input (v in ) the minimum v in has to meet two conditions in order to ensure that the output maintains regulation: v in ? 2.7v and v in ? [(v r + 2.5%) + v dropout ]. the maximum v in should be less than or equal to 6v. power dissipation may limit v in to a lower potential in order to maintain a junction temperature below 125c. refer to section 5.0 thermal considerations , for determining junction temperature. it is recommended that v in be bypassed to gnd with a ceramic capacitor. pin no. 5-pin sc-70 pin no. 5-pin sot-23 5-pin sc-70r symbol description 13s h d n shutdown control input 24 nc no connect 32 gnd ground terminal 45 v out regulated voltage output 51v in unregulated supply input downloaded from: http:///
tc1017 ds21813f-page 10 ? 2005-2013 microchip technology inc. 4.0 detailed description the tc1017 is a precision, fixed-output, linear voltage regulator. the internal linear pass element is a p-channel mosfet. as with all p-channel cmos ldos, there is a body drain diode with the cathode connected to v in and the anode connected to v out ( figure 4-1 ). as is shown in figure 4-1 , the output voltage of the ldo is sensed and divided down internally to reduce external component count. the internal error amplifier has a fixed bandgap reference on the inverting input and the sensed output voltage on the non-inverting input. the error amplifier output will pull the gate voltage down until the inputs of the error amplifier are equal to regulate the output voltage. output overload protection is implemented by sensing the current in the p-channel mosfet. during a shorted or faulted load condition in which the output voltage falls to less than 0.5v, the output current is limited to a typical value of 120 ma. the current-limit protection helps prevent excessive current from damaging the printed circuit board (pcb). an internal thermal sensing device is used to monitor the junction temperature of the ldo. when the sensed temperature is over the set threshold of 160c (typical), the p-channel mosfet is turned off. when the p-chan- nel is off, the power dissipation internal to the device is almost zero. the device cools until the junction tem- perature is approximately 150c and the p-channel is turned on. if the internal power dissipation is still high enough for the junction to rise to 160c, it will again shut off and cool. the maximum operating junction tempera- ture of the device is 125c. steady-state operation at or near the 160c overtemperature point can lead to per- manent damage of the device. the output voltage v out remains stable over the entire input operating voltage range (2.7v to 6.0v) and the entire load range (0 ma to 150 ma). the output voltage is sensed through an internal resistor divider and compared with a precision internal voltage reference. several fixed-output voltages are available by changing the value of the internal resistor divider. figure 4-2 shows a typical application circuit. the regulator is enabled any time the shutdown input pin is at or above v ih . it is shut down (disabled) any time the shutdown input pin is below v il . for applications where the shdn feature is not used, tie the shdn pin directly to the input supply voltage source. while in shutdown, the supply current decreases to 0.006 a (typical) and the p-channel mosfet is turned off. as shown in figure 4-2 , batteries have internal source impedance. an input capacitor is used to lower the input impedance of the ldo. in some applications, high input impedance can cause the ldo to become unstable. adding more input capacitance can compensate for this. figure 4-1: tc1017 block diagram (5-pin sc-70 pinout). figure 4-2: typical application circuit (5-pin sc-70 pinout). + - ea v out v ref shdn v in 54 r 1 r 2 12 3 shdn gnd v in nc current limit over error feedback resistors control te mp . body diode amp v out 54 12 3 shdn gnd v in nc battery r source c in 1f ceramic c out 1f ceramic tc1017 load downloaded from: http:///
? 2005-2013 microchip technology inc. ds21813f-page 11 tc1017 4.1 input capacitor low input source impedance is necessary for the ldo to operate properly. when operating from batteries, or in applications with long lead length (> 10") between the input source and the ldo, some input capacitance is required. a minimum of 0.1 f is recommended for most applications and the capacitor should be placed as close to the input of the ldo as is practical. larger input capacitors will help reduce the input impedance and further reduce any high-frequency noise on the input and output of the ldo. 4.2 output capacitor a minimum output capacitance of 1 f for the tc1017 is required for stability. the equivalent series resis- tance (esr) requirements on the output capacitor are between 0 and 2 ohms. the output capacitor should be located as close to the ldo output as is practical. ceramic materials x7r and x5r have low temperature coefficients and are well within the acceptable esr range required. a typical 1 f x5r 0805 capacitor has an esr of 50 milli-ohms. larger output capacitors can be used with the tc1017 to improve dynamic behavior and input ripple-rejection performance. ceramic, aluminum electrolytic or tantalum capacitor types can be used. since many aluminum electrolytic capacitors freeze at approximately C30 ? c, ceramic or solid tantalums are recommended for applications operating below C25 ? c. when operating from sources other than batteries, supply-noise rejection and transient response can be improved by increasing the value of the input and output capacitors and employing passive filtering techniques. 4.3 turn-on response the turn-on response is defined as two separate response categories, wake-up time (t wk ) and settling time (t s ). the tc1017 has a fast wake-up time (10 sec, typical) when released from shutdown. see figure 4-3 for the wake-up time designated as t wk . the wake-up time is defined as the time it takes for the output to rise to 2% of the v out value after being released from shutdown. the total turn-on response is defined as the settling time (t s ) (see figure 4-3 ). settling time (inclusive with t wk ) is defined as the condition when the output is within 98% of its fully-enabled value (32 sec, typical) when released from shutdown. the settling time of the output voltage is dependent on load conditions and output capacitance on v out (rc response). the table below demonstrates the typical turn-on response timing for different input voltage power-up frequencies: v out = 2.85v, v in = 5.0v, i out = 60 ma and c out = 1 f. figure 4-3: wake-up time from shutdown. frequency typical (t wk ) typical (t s ) 1000 hz 5.3 sec 14 sec 500 hz 5.9 sec 16 sec 100 hz 9.8 sec 32 sec 50 hz 14.5 sec 52 sec 10 hz 17.2 sec 77 sec v ih t s t wk v out 98% 2% v il shdn downloaded from: http:///
tc1017 ds21813f-page 12 ? 2005-2013 microchip technology inc. 5.0 thermal considerations 5.1 thermal shutdown integrated thermal protection circuitry shuts the regulator off when the die temperature exceeds approximately 160c. the regulator remains off until the die temperature drops to approximately 150c. 5.2 power dissipation: sc-70 the tc1017 is available in the sc-70 package. the thermal resistance for the sc-70 package is approximately 450c/w when the copper area used in the pcb layout is similar to the jedec j51-7 high ther- mal conductivity standard or semi-g42-88 standard. for applications with a larger or thicker copper area, the thermal resistance can be lowered. see an792, a method to determine how much power a sot-23 can dissipate in an application (ds00792), for a method to determine the thermal resistance for a particular appli- cation. the tc1017 power dissipation capability is dependant upon several variables: input voltage, output voltage, load current, ambient temperature and maximum junction temperature. the absolute maximum steady- state junction temperature is rated at +125c. the power dissipation within the device is equal to: equation 5-1: the v in x i gnd term is typically very small when compared to the (v in Cv out ) x i load term, simplifying the power dissipation within the ldo to be: equation 5-2: to determine the maximum power dissipation capability, the following equation is used: equation 5-3: given the following example: find: 1. internal power dissipation: 2. maximum allowable ambient temperature: 3. maximum allowable power dissipation at desired ambient: in this example, the tc1017 dissipates approximately 158.5 mw and the junction temperature is raised 71c over the ambient. the absolute maximum power dissipation is 155 mw when given a maximum ambient temperature of 55c. input voltage, output voltage or load current limits can also be determined by substituting known values in the power dissipation equations. figure 5-1 and figure 5-2 depict typical maximum power dissipation versus ambient temperature, as well as typical maximum current versus ambient tempera- ture, with a 1v input voltage to output voltage differential, respectively. figure 5-1: power dissipation vs. ambient temperature (sc-70 package). p d v in v out ? ?? i load v in i gnd ? + ? = p d v in v out ? ?? i load ? = p dmax t j_max t a_max ? ?? r ? ja ---------------------------------------------- = where: t j_max = the maximum junction temperature allowed t a_max = the maximum ambient temperature r ? ja = the thermal resistance from junction to air v in = 3.0v to 4.1v v out = 2.85v 2.5% i load = 120 ma (output current) t a = 55c (max. desired ambient) p dmax v in_max v out_min ? ?? i load ? = 4.1v 2.85 0.975 ?? ? ? ?? 120ma ? = 158.5mw = t a_max t j_max p ? dmax r ? ja ? = 125 ? c 158.5mw 450 ? c/w ? ? ?? = 54 ? c = 125 ? c71 ? c ? ?? = p d t j_max t a ? r ? ja ----------------------------- - = 155mw = 125 ? c55 ? c ? 450 ? c/w ---------------------------------- - = 0 50 100 150 200 250 300 350 400 -40 -15 10 35 60 85 110 ambient temperature (c) power dissipation (mw) downloaded from: http:///
? 2005-2013 microchip technology inc. ds21813f-page 13 tc1017 figure 5-2: maximum current vs. ambient temperature (sc-70 package). 5.3 power dissipation: sot-23 the tc1017 is also available in a sot-23 package for improved thermal performance. the thermal resistance for the sot-23 package is approximately 255c/w when the copper area used in the printed circuit board layout is similar to the jedec j51-7 low thermal conductivity standard or semi-g42-88 standard. for applications with a larger or thicker copper area, the thermal resistance can be lowered. see an792, a method to determine how much power a sot-23 can dissipate in an application (ds00792), for a method to determine the thermal resistance for a particular application. the tc1017 power dissipation capability is dependant upon several variables: input voltage, output voltage, load current, ambient temperature and maximum junction temperature. the absolute maximum steady- state junction temperature is rated at +125c. the power dissipation within the device is equal to: equation 5-4: the v in x i gnd term is typically very small when compared to the (v in Cv out ) x i load term, simplifying the power dissipation within the ldo to be: equation 5-5: to determine the maximum power dissipation capability, the following equation is used: equation 5-6: given the following example: find: 1. internal power dissipation: 2. maximum allowable ambient temperature: 3. maximum allowable power dissipation at desired ambient: in this example, the tc1017 dissipates approximately 158.5 mw and the junction temperature is raised 40.5c over the ambient. the absolute maximum power dissipation is 157 mw when given a maximum ambient temperature of +85c. input voltage, output voltage or load current limits can also be determined by substituting known values in the power dissipation equations. figure 5-3 and figure 5-4 depict typical maximum power dissipation versus ambient temperature, as well as typical maximum current versus ambient tempera- ture with a 1v input voltage to output voltage differential, respectively. 0 20 40 60 80 100 120 140 160 -40 -15 10 35 60 85 110 ambient temperature (c) maximum current (ma) v in - v out = 1v p d v in v out ? ?? i load v in i gnd ? + ? = p d v in v out ? ?? i load ? = v in = 3.0v to 4.1v v out = 2.85v 2.5% i load = 120 ma (output current) t a = +85c (max. desired ambient) p dmax t j_max t a_max ? ?? r ? ja ------------------------------------------------- = where: t j_max = the maximum junction temperature allowed t a_max = the maximum ambient temperature r ? ja = the thermal resistance from junction to air p dmax v in_max v out_min ? ?? i load ? = 4.1v 2.85 0.975 ?? ? ? ?? 120ma ? = 158.5mw = t a_max t j_max p ? dmax r ? ja ? = 125 ? c 158.5mw 255 ? c/w ? ? ?? = 84.5 ? c = 125 ? c40.5 ? c ? ?? = p d t j_max t a ? r ? ja ----------------------------- - = 157mw = 125 ? c85 ? c ? 255 ? c/w ---------------------------------- - = downloaded from: http:///
tc1017 ds21813f-page 14 ? 2005-2013 microchip technology inc. figure 5-3: power dissipation vs. ambient temperature (sot-23 package). figure 5-4: maximum current vs. ambient temperature (sot-23 package). 5.4 layout considerations the primary path for heat conduction out of the sc-70/ sot-23 package is through the package leads. using heavy, wide traces at the pads of the device will facilitate the removal of the heat within the package, thus lowering the thermal resistance r ? ja . by lowering the thermal resistance, the maximum internal power dissipation capability of the package is increased. figure 5-5: sc-70 package suggested layout. 0 100 200 300 400 500 600 700 -40 -15 10 35 60 85 110 ambient temperature (c) power dissipation (mw) 0 20 40 60 80 100 120 140 160 -40 -15 10 35 60 85 110 ambient temperature (c) maximum current (ma) v in - v out = 1v shdnu1 v in v out gnd c 1 c 2 downloaded from: http:///
? 2005-2013 microchip technology inc. ds21813f-page 15 tc1017 6.0 package information 6.1 package marking information 5-pin sc-70/sc-70r top side bottom side xxn yww xxn part number tc1017 pinout code tc1017r pinout code tc1017 C 1.8vlt ce cu tc1017 C 1.85vlt cq df tc1017 C 1.9vlt cb tc1017 C 2.5vlt cr cv tc1017 C 2.6vlt cf cw tc1017 C 2.7vlt cg cx tc1017 C 2.8vlt ch cy tc1017 C 2.85vlt cj cz tc1017 C 2.9vlt ck da tc1017 C 3.0vlt cl db tc1017 C 3.2vlt cc dc tc1017 C 3.3vlt cm dd tc1017 C 4.0vlt cp de 5-pin sc-70/sc-70r n legend: xx...x customer-specific information* y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e or 5-lead sot-23 xxnn part number code tc1017 C 1.8vct da tc1017 C 1.85vct dk tc1017 C 2.6vct db tc1017 C 2.7vct dc tc1017 C 2.8vct dd tc1017 C 2.85vct de tc1017 C 2.9vct df tc1017 C 3.0vct dg tc1017 C 3.3vct dh tc1017 C 4.0vct dj example: dann downloaded from: http:///
tc1017 ds21813f-page 16 ? 2005-2013 microchip technology inc.

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? 2005-2013 microchip technology inc. ds21813f-page 19 tc1017 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
tc1017 ds21813f-page 20 ? 2005-2013 microchip technology inc. notes: downloaded from: http:///
? 2005-2013 microchip technology inc. ds21813f-page 21 tc1017 appendix a: revision history revision f (april 2013) the following is the list of modifications: updated the information for the maximum output current parameter in the electrical characteristics table. revision e (january 2013) added a note to each package outline drawing. revision d (february 2005) undocumented changes. downloaded from: http:///
tc1017 ds21813f-page 22 ? 2005-2013 microchip technology inc. notes: downloaded from: http:///
? 2005-2013 microchip technology inc. ds21813f-page 23 tc1017 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . device: tc1017: 150 ma tiny cmos ldo with shutdown tc1017r:150 ma tiny cmos ldo with shutdown (sc-70 only) voltage options:* (standard) 1.8v 1.85v 2.5v sc-70 only 2.6v 2.7v 2.8v 2.85v 2.9v 3.0v 3.2v sc-70 only 3.3v 4.0v * other voltage options available. please contact your local microchip sales office for details. temperature range: v = -40c to +125c package: lttr = 5-pin sc-70 (tape and reel) cttr = 5-pin sot-23 (tape and reel) part no. x .xx x temperature voltage options device range examples: a) tc1017-1.8vlttr: 150 ma, tiny cmos ldo with shutdown, sc-70 package. b) tc1017r-1.8vlttr:150ma, tiny cmos ldo with shutdown, sc-70r package. c) tc1017-2.6vcttr: 150 ma, tiny cmos ldo with shutdown, sot-23 package. d) tc1017-2.7vlttr: 150 ma, tiny cmos ldo with shutdown, sc-70 package. e) tc1017-2.8vcttr: 150 ma, tiny cmos ldo with shutdown, sot-23 package. f) tc1017-2.85vlttr:150 ma, tiny cmos ldo with shutdown, sc-70 package. g) tc1017-2.9vcttr: 150 ma, tiny cmos ldo with shutdown, sot-23 package. h) tc1017-3.0vlttr: 150 ma, tiny cmos ldo with shutdown, sc-70 package. i) tc1017-3.3vcttr: 150 ma, tiny cmos ldo with shutdown, sot-23 package. j) tc1017-4.0vlttr: 150 ma, tiny cmos ldo with shutdown, sc-70 package. xxxx package downloaded from: http:///
tc1017 ds21813f-page 24 ? 2005-2013 microchip technology inc. notes: downloaded from: http:///
? 2005-2013 microchip technology inc. ds21813f-page 25 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyers risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, flashflex, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mtp, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. analog-for-the-digital age, app lication maestro, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mpf, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, sqi, serial quad i/o, total endurance, tsharc, uniwindriver, wiperlock, zena and z-scale are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. gestic and ulpp are registered trademarks of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2005-2013, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 9781620771440 note the following details of the code protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specif ications contained in microchips data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as unbreakable. code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchips code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the companys quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory an d analog products. in addition, microchips quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 == downloaded from: http:///
ds21813f-page 26 ? 2005-2013 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://www.microchip.com/ support web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 cleveland independence, oh tel: 216-447-0464 fax: 216-447-0643 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 indianapolis noblesville, in tel: 317-773-8323 fax: 317-773-5453 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8569-7000 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - chongqing tel: 86-23-8980-9588 fax: 86-23-8980-9500 china - hangzhou tel: 86-571-2819-3187 fax: 86-571-2819-3189 china - hong kong sar tel: 852-2943-5100 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8864-2200 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 asia/pacific india - bangalore tel: 91-80-3090-4444 fax: 91-80-3090-4123 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - osaka tel: 81-6-6152-7160 fax: 81-6-6152-9310 japan - tokyo tel: 81-3-6880- 3770 fax: 81-3-6880-3771 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-5778-366 fax: 886-3-5770-955 taiwan - kaohsiung tel: 886-7-213-7828 fax: 886-7-330-9305 taiwan - taipei tel: 886-2-2508-8600 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 worldwide sales and service 11/29/12 downloaded from: http:///

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